CPU Core Physical Design Engineer

About This Role

• Do Something Wonderful! Intel put Silicon in Silicon Valley.
• No one else is obsessed with engineering and has a brighter future.
• Every day, we create world changing technology that enriches the lives of every person on earth.
• So, if you have a big idea, let's do something wonderful together.
• Join us, because at Intel, we are building a better tomorrow.
• Who We Are The Full Chip Timing (FCT) Design Automation team plays a critical role in supporting all aspects of full chip timing integration.
• Our mission is to enable seamless timing closure and optimization across the entire backend flow.
• We develop and maintain automation environments, tools, and methodologies that ensure high-quality timing models and constraint management.
• Who You Are Some of the responsibilities of this role will include but are not limited to: Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing.
• Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
• Conduct verification and signoff include formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
• Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams.
• Possesses CPU specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.
• Works intimately with industry EDA vendors to build and enhance tool capabilities to design a highspeed, low power synthesizable CPU.
• Optimizes CPU design to improve product level parameters such as power, frequency, and area.
• Participates in the development and improvement of physical design methodologies and flow automation.