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About This Role
- Designs complex layouts of analog signal circuits for a given design specification and runs complete set of design verification tools for process design rules, electron migration, voltage drop (IR), ESD, and other reliability checks on the layouts.
- Designs and analyzes floorplans, power grid, ESD, bumps, and performs all required verification on the analog blocks.
- Performs the micro floor-planning and detail signal planning of complex analog circuits to meet performance and electrical requirements (shielding, matching) for critical signals to optimize for area, power, RV, and performance.
- Develops and drives new and innovative analog layout methodologies to improve layout productivity and quality.
- Collaborates with analog circuit design, process technology, and package design teams to meet design specifications, plan work, and negotiate layout tradeoffs as needed.
- Troubleshoots a wide variety of issues up to and including design and tool/flow/methodology used in analog layout design.
Qualifications
- Experience of 6+ Yrs • Handles Larger Layout blocks independently ( RX, TX, LDOs ), capable to create execution plan, estimate efforts for the blocks and lead a small team of layout designers, assign and track work • Works with leads on Top level layout, provides inputs for efficient floorplan • Very good understanding of RV, ESD and Analog layout skills • Expert in all flows and tools like Virtuoso/CustomCompiler, ICV/Caliber, Redhawk/Voltus, Extraction tools like StarRC. • Good knowledge of Design Rule Decks • Shows interest and implements automation ideas • Good understanding of complex ckt ADC, vregs, DACs, current mirrors, PLLs, Chargepumps, amplifiers etc.. • Min Educational Qualification - Master or Bachelors in EE • Expectation will be that the person will work as an individual contributor, with an added responsibility to technically lead a small team of Layout designers to complete layout of larger designs.
Sourced directly from Intel’s career page
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Specialisation
Salary range
₹4-10 LPA to ₹40-75 LPA
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652 positions
Job ID
/job/India-Bangalore/Analog-Layout-Design-Engineer_JR0284911-1
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