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What You'll Do
- Lead ATE test development for wafer sort (CP) and final test (FT) Drive first‑silicon bring‑up, debug, and characterization Define test coverage, binning, guard‑banding, and production release criteria Analyze yield and failure data; drive test‑related yield and quality improvements Partner with DFT, design, OSATs, and test houses to ensure manufacturable solutions Support qualification, production ramp, and sustained manufacturing Mentor engineers and act as a technical test leader across product teams Job Qualifications: 10+ years of experience in ATE test engineering Strong hands‑on experience with CP/FT test program development Experience with Advantest 93K ATE platform Solid understanding of DFT and silicon debug Proven experience supporting production and working with offshore test partners Strong problem‑solving and cross‑functional communication skills We’re doing work that matters.
- Help us solve what others can’t.
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Specialisation
Open roles at Cadence Design Systems
658 positions
Job ID
/job/HSINCHU/Sr-Principal-Test-Engineer_R53883
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