Sr Principal Design Engineer

What You'll Do

• Collaborate within a team to design, optimize, verify, and document a library of high-quality arithmetic components (e.g., floating-point operators) for chip designers.
• Ensure components are robust, efficient, and easy to integrate.
• Define and maintain architectural standards for software and hardware integration.
• Partner with internal and external stakeholders to capture requirements and translate them into technical specifications.
• Drive innovation in system design and optimization for timing, area, and power.
• Job Qualifications: Strong academic background (Bachelor’s or Master’s in computer science, Software Engineering, Mathematics, Physics, or Electrical Engineering. (PhD is a plus) Proven experience in hardware design with (System)Verilog.
• Solid programming skills in C++, Java, or Python; experience with scripting languages (e.g., TCL) is a plus.
• Expertise in system design.
• Familiarity with formal verification and design verification methodologies.
• Knowledge of floating-point arithmetic and numerical computation is advantageous.
• Hands-on experience with simulation tools, modelling, and performance optimization.
• Excellent analytical and creative problem-solving skills.
• Strong communication skills and ability to interface with internal and external stakeholders.
• Check what we can offer you: Competitive salary 25 days holiday per year Private Medical and Dental plans, Income Protection and Life Insurance Group Personal Pension Plan Cycle to work scheme and gym subsidy 5 days paid time to volunteer to give back to our communities Employee Stock Purchase Plan The opportunity to work for a Great Place to Work© & Fortune 100 organization Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization.
• We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.
• We’re doing work that matters.
• Help us solve what others can’t.