Senior Technical Program Manager

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What You'll Do

  • Work with internal & external customers and stakeholders to define project objectives and requirements.
  • Prioritize requirements and define scope to meet customer needs in a timely manner given available resources.
  • Develop, maintain, and distribute (as appropriate) standard project management deliverables for the successful implementation of the project, including: implementation plan, project schedule, project budget and variances, issues & action items log, meeting minutes, risks assessment and contingencies.
  • Manage deliverables (including SOWs, change management, approval of deliverables).
  • Partner with internal and external development teams to deliver on time and with the quality required.
  • Serve as the project owner in development process; maintaining quality checklists, Jira tickets, schedule tracker etc.
  • Anticipate problems and complications and formulate solutions so as not to impede the progress of the project.
  • Assume responsibility and drive ownership for issue resolution.
  • Holding status update meetings with technical teams and updating higher management on the project progress.
  • Create and maintain scorecards and/or dashboard status to track project performance.
  • Be accountable for on-time project delivery, product quality, cost, and operations.
  • Qualifications Bachelor’s degree in engineering from an accredited institution.
  • MSEE preferred 8+ years of experience, out of which at least 3+ years of Program Management or Technical Product Management experience in Chip Design/ VLSI organization.
  • Strong project management skills with the ability to work on and track multiple projects simultaneously.
  • PMP/PgMP and/or other Project Management certification would be preferred.
  • Excellent in English, both verbally and literarily, as a working language.
  • Excellent interpersonal skills and ability to communicate effectively with both technical and nontechnical individuals.
  • Knowledgeable about interface IP like DDR, HBM, Serdes, UCIe etc is an added advantage Demonstrated ability to think creatively and strategically when executing the project and solving problems.
  • Familiar with mixed-signal IP design flow and methodologies, Verilog/RTL coding & Verification would be a plus We’re doing work that matters.
  • Help us solve what others can’t.

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Cadence Design Systems

GYEONGGI-DO (Seoul)

Specialisation
Open roles at Cadence Design Systems
658 positions
Job ID
/job/GYEONGGI-DO-Seoul/Senior-Technical-Program-Manager_R53246-1

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