Senior Principal Software Engineer - Compiler Development

What You'll Do

• Language Evolution: Design and implement advanced SystemVerilog language extensions .
• Compiler Architecture: Develop and optimize high-performance front-end and code generation compiler components, focusing on intermediate representations (IR) that scale to multi-billion gate designs.
• Performance Engineering: Conduct deep-dive bottleneck analysis and implement performance optimizations in C/C++ to improve compilation speed and memory footprint.
• Design Scalability: Architect compiler and simulator specifically tuned for complex AI designs , ensuring the engine can handle the massive replicated and parallel structures inherent in next-gen neural processing units (NPUs).
• Innovation & Research: Explore and prototype "blue-sky" features, LLM enhanced Compilation, parallel compilation, distributed compilation.
• Qualifications BS with a minimum of 10 years of experience OR MS with a minimum of 7 years of experience OR PhD with a minimum of 5 years of experience 5+ years in Compiler Development, EDA, or High-Performance Computing.
• Expert-level C++ (modern standards) and a deep understanding of SystemVerilog or Verilog.
• Proven track record in compiler theory (lexing, parsing, semantic analysis, code generation).
• Experience with multi-threading, memory management, and cache-locality optimizations.
• An inventive spirit with the desire to challenge the status quo of traditional EDA tools.
• Why This Role is Exciting "You aren't just maintaining a tool; you are building the backbone of the semiconductor industry.
• As AI chips grow in complexity, the compiler becomes the primary gatekeeper of engineering productivity.
• Here, you will invent the techniques that allow the world's most advanced chips to reach the market." Scale: Work on codebases that manage the largest designs on the planet.
• Impact: Your optimizations directly reduce the "time-to-market" for global tech giants.
• Future-Proofing: Be part of the transition toward AI-accelerated chip design and cloud-scale verification.
• Desirable Skills Knowledge of LLVM or similar compiler frameworks.
• Experience with Python for internal tooling and test automation.
• Familiarity with hardware verification environments (UVM).
• Are you ready to build the compiler that designs the future? Apply to join the System Verification Group today.
• The annual salary range for Massachusetts is $140,000 to $260,000.
• You may also be eligible to receive incentive compensation: bonus, equity, and benefits.
• Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure.
• Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.
• Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
• We’re doing work that matters.
• Help us solve what others can’t.