Principal Product Engineer(Serdes IP)

What You'll Do

• Lead bring‑up and debug of CDNS SerDes PHY IPs for customer silicon.
• Perform detailed analysis of signal integrity, jitter, and BER performance.
• Drive root‑cause investigations for silicon issues and propose corrective actions.
• Use oscilloscopes, BERTs, protocol analyzers, and other lab equipment to measure CDNS PHY function and performance.
• Maintain CDNS Testchip bench locally to duplicate and debug the issues that external customers are dealing with.
• Collaborate with FW teams to validate SerDes initialization sequences, support FW debugging related to SerDes bring‑up.
• Working with global (US, west and east coast) teams in different time-zones.
• Travel as needed to support post‑silicon bring‑up and customer engagements.
• AI Incorporation: Leverage AI-powered tools and assistants to enhance productivity, improve decision making, and maintain high-quality customer deliverables.
• Apply AI-powered analytics tools to extract insights, identify patterns, and generate actionable recommendations from complex datasets.
• Skills & Qualifications Required Bachelor’s in computer science or electrical engineering + 7 years of related experience, or Masters +5 years of related experience.
• Very strong experience in silicon bring-up with lab equipment (Scope/Bert/PCIe exerciser/analyzer) Very strong experience in PCIe protocol, PCIe LTSSM link stable analysis, PCI Compliance test.
• Familiar with board design.
• Ability to read schematics and conduct SI/PI analysis and review for customer board implementation.
• Strong communication and organizational skills.
• Ability to prioritize cases, anticipate escalations Experience on Ethernet or USB or DP or JESD will be plus.
• Experience on Serdes components like Tx FFE, Rx CTLE& DFE& VGA&FFE will be plus.
• Experience on DSP based Serdes receiver will be plus.
• Experience on PLL algorithm will be plus.
• We’re doing work that matters.
• Help us solve what others can’t.