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What You'll Do
- Design and implement scalable infrastructure for AI agents operating within Cadence’s ChipStack SuperAgent ecosystem.
- Build robust evaluation frameworks to measure agent performance, reliability, and alignment with engineering workflows.
- Develop data pipelines, retrieval systems, and context-engineering strategies to support consistent and grounded agent behavior.
- Contribute to continuous integration, automated testing, and observability systems to ensure production-quality deployment of AI-enabled systems.
- Optimize system performance across latency, cost, reliability, and scalability dimensions.
- Required Qualifications BS with a minimum of 7 years of experience OR MS with a minimum of 5 years of experience OR PhD with a minimum of 1 year of experience.
- Strong software engineering fundamentals, including design, refactoring, debugging, and testing of complex distributed systems.
- Demonstrated experience building production-quality systems.
- Understanding of large language models (LLMs) and practical considerations for deploying them in real-world systems (latency, cost, reliability, monitoring).
- Experience designing evaluation frameworks for AI systems, including benchmarking, regression testing, and failure analysis.
- Skills of Interest Agent architecture: Experience with reason–act loops, planning/evaluation/self-correction patterns, tool/function calling, persistent memory systems, and structured outputs.
- LLM engineering: Familiarity with frontier LLMs and trade-offs across model families; experience with prompt engineering, context management, and alignment techniques.
- Retrieval and data systems: Understanding of RAG pipelines, embeddings, indexing strategies, chunking methodologies, and grounding techniques.
- Infrastructure and observability: Experience building logging, tracing, monitoring, and evaluation systems for ML/AI applications.
- AI-assisted development workflows: Leveraging AI tools to enhance engineering productivity and code quality.
- Interest in semiconductor design, EDA workflows, and high-performance computing environments.
- Our Culture Challenge the status quo: We are innovators who challenge industry norms and push forward our vision of how silicon should be built.
- Strong opinions, loosely held: We are low on ego, but high on collaboration.
- We are okay to be wrong and are always open to learning.
- Ship fast, ship quality: We ruthlessly prioritize what matters.
- We build at lightning speed, but never compromise on the high standards required by the semiconductor industry.
- Proud of our craft: Attention to detail is in our DNA.
- We take pride in what we build and go the extra mile to ensure an exceptional experience for our users.
- The annual salary range for California is $136,500 to $253,500.
- You may also be eligible to receive incentive compensation: bonus, equity, and benefits.
- Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure.
- Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.
- Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
- We’re doing work that matters.
- Help us solve what others can’t.
Sourced directly from Cadence Design Systems’s career page
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Specialisation
Open roles at Cadence Design Systems
658 positions
Job ID
/job/SAN-JOSE/Principal-Applied-ML-Engineer_R53702-1
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