Principal Application Engineer - Pre-Sales for Silicon IP

Overview

• At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
• Position Description: Providing direct technical support to customers in presale stage to persuade customers to adopt Cadence Design IP solutions for their applications Interface with customer architects and IP business unit to enable evaluation of application specific IP performance and features per customer’s SoC requirements.
• Working with the sales team to manage the IP activities in the region to achieve a high customer satisfaction rate and for building strong customer relationships Providing customer feedback on new/existing requirements for Design IP usage from customers to the R&D business unit Providing direct technical customer support and assistance to enable customers to successfully integrate/use Design IP in their SoC Writing application notes and review protocol specifications for Design IP Position Requirements: 10+ years relative working experience with M.S.
• Electrical/Computer Engineering (or similar degree) Experience in SoC design Good understanding of SoC architecture Experience with DDR or PCIe or Ethernet or USB subsystem hardware or firmware developing, testing or debugging Good understanding DDR or PCIe or Ethernet or USB protocols Good written and verbal communication skills and problem solving skills are required Ability to conduct technical meetings, presentations, seminars and training to customers and to the sales team Travel within AP region may be required.
• Good understanding of the semiconductor IP marketplace and ecosystem is a plus We’re doing work that matters.
• Help us solve what others can’t.