Lead Solutions Engineer – Runset Enablement (Physical Verification)

2 LocationsVerificationVery High demand

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What You'll Do

  • Drive hands‑on development and validation of Pegasus DRC and LVS runsets for advanced semiconductor nodes.
  • Design, enhance, and maintain automation frameworks for regression execution, issue detection, and validation reporting.
  • Collaborate closely with R&D and cross‑functional teams to debug issues, validate fixes, and improve solution quality and performance.
  • Provide technical enablement and support to customers on tool usage and advanced physical verification methodologies.
  • Apply and help refine best practices for runset development, validation, and quality assurance.
  • Work independently on complex technical deliverables while contributing knowledge and guidance within the team.
  • Partner with internal teams to support predictable and timely delivery of physical verification solutions.
  • Qualifications MS degree with 5+ years of experience or PhD with 3+ years in Electrical Engineering, Computer Science, or related field.
  • Strong understanding of semiconductor design flows and physical verification methodologies.
  • Experience and Technical Skills Proven hands‑on experience developing and validating DRC and LVS runsets using Pegasus or comparable tools such as Calibre, ICV, or Assura.
  • Experience building or maintaining automation for regression, validation, and reporting.
  • Proficiency in TCL, Python, and/or Perl, with experience in Linux/Unix environments.
  • Solid understanding of advanced process technologies and verification methodologies (e.g., ground rules, fill, ESD).
  • Familiarity with chip fabrication processes and advanced‑node challenges, including multi‑die designs.
  • Nice‑to‑have: Experience with PERC and Fill runsets.
  • Professional Skills Strong hands‑on problem‑solving and technical execution skills.
  • Clear written and verbal communication skills for technical and customer interactions.
  • Ability to collaborate effectively across cross‑functional and global teams.
  • Comfortable taking ownership of technical tasks and driving them to completion.
  • High integrity and a collaborative, team‑oriented working style.
  • The annual salary range for California is $102,900 to $191,100.
  • You may also be eligible to receive incentive compensation: bonus, equity, and benefits.
  • Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure.
  • Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.
  • Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
  • We’re doing work that matters.
  • Help us solve what others can’t.

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Specialisation
Salary range
₹5-12 LPA to ₹40-70 LPA
Open roles at Cadence Design Systems
631 positions
Job ID
/job/SAN-JOSE/Lead-Solutions-Engineer---Runset-Enablement--Physical-Verification-_R52311

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