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Overview

  • At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

What You'll Do

  • Focus on high speed digital DDR and HBM IP physical implementation, develop necessary scripts or tools to enhance current PD design flow.
  • Work in product projects, including but not limited to: complete the project tasks; solve design issue and provide flow to check and avoid similar issue; analyze and summarize PPA optimization methodologies and results, implement optimal design parameters and flows for different projects.
  • Job Requirement: -MS in EE with at least 3 years relevant IC design experience -Good physical design experience in the digital implementation domain including Floorplan, CTS, STA, Physical verification, Power analysis. -Solid background in circuits, electronics, physics, be willing to learn new technology for cutting edge process node and advanced design methodology. -Skilled in scripting language, such as Perl, C shell, TCL, Makefile, Python. -Familiar with EDA tools like Innovus, ICC, Calibre, Tempus, PrimeTime, etc We’re doing work that matters.
  • Help us solve what others can’t.

Sourced directly from Cadence Design Systems’s career page

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Specialisation
Open roles at Cadence Design Systems
658 positions
Job ID
/job/SHANGHAI/Lead-Design-Engineer_R54183

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