Intern

What You'll Do

• Perform as a member of the Logic Design Team for Xtensa processors.
• Responsible for the RTL implementation of microprocessor cores, multiprocessor sub-systems and their peripherals.
• Implement the micro-architecture in Verilog RTL, simulate and debug its functions and run synthesis, place & route and other Electronic Design Automation scripts to meet timing, area, and power goals.
• Assist with developing test plans; writing functional diagnostics; debugging failures; and analyzing coverage information.
• Work closely with various Design Verification and Electronic Design Automation teams.
• Position Requirements: • Pursuing Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a similar major. • Deep understanding of Digital Design Fundamentals • Excellent automation skills using Tcl, Perl, shell scripting • Excellent oral and written communications skills • Exposure to design automation tools is a plus Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization.
• We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.
• We’re doing work that matters.
• Help us solve what others can’t.