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What You'll Do
- development of HDL compiler front-end for SV, VHDL LRM support, improving compiler performance and infrastructure.
- Exposure to RTL simulation/synthesis and runtime environment is highly desirable.
- We’re doing work that matters.
- Help us solve what others can’t.
Sourced directly from Cadence Design Systems’s career page
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Specialisation
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567 positions
Job ID
/job/NOIDA/Principal-Software-Engineer_R56192
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