R&D Engineer Physical Design

About This Role

• Broadcom develops critical infrastructure chips that empower customers across nearly every major segment of the semiconductor industry—including AI—to build advanced ASIC solutions.
• Join the Design Implementation team within Broadcom’s ASIC Products Division, where we deliver cutting-edge CMOS ASICs for leading AI/ML, wireless, networking, computing, and storage applications.
• In this role, you will gain hands-on experience taking innovative integrated circuit designs from concept to product release, becoming a key contributor to all aspects of physical ASIC design.
• Job Duties and Responsibilities may include: Communicating directly with customers Integrating memories, SerDes, and I/O subsystems Integrating test structures and clocking architectures Evaluating design trade-offs involving power, area, and performance Addressing challenges related to timing closure, and signal integrity Working on timing analysis for both mission and test modes Requirements: BS Degree in Electrical Engineering and 12+ years related experience or MS in Electrical Engineering and 10+ years related work experience.
• Additional Job Description: Compensation and Benefits The annual base salary range for this position is $141,300 - $226,000.
• This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
• Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time.
• The company follows all applicable laws for Paid Family Leave and other leaves of absence.
• We will also consider qualified applicants with arrest and conviction records consistent with local law.
• If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.