Package Design Engineer

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About This Role

  • Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs.
  • You will be part of a worldwide R&D team developing high-performance package designs for ASICs for artificial intelligence (AI), networking, high-performance computing (HPC), and 5G base stations.
  • These designs include SerDes at 224G and higher, 5G RF/Microwave ADC/DAC, HBM, DDR5 and more.
  • You'll have the opportunity to collaborate with the team to create the package structures needed to enable new design, and contribute to efficiency improvements for our design team.

What You'll Do

  • Overall design responsibility for ASIC package designs, including aspects of signal integrity, power integrity, manufacturability, reliability, and thermal, in partnership with our experienced team of package engineering experts.
  • Package Design of critical structures for SerDes, ADC/DAC, DDR, etc.
  • Schedule, prioritize, & track your work across 2+ projects simultaneously General flip-chip BGA package design & engineering Project management and customer interface for your design projects Contribute to efficiency improvements for the design team, through process development/improvement, automation, documentation, etc.
  • Physical design (layout) is a foundational responsibility in this role EDUCATION/EXPERIENCE & REQUIREMENTS: BSEE or similar field and 8+ years’ experience in flip-chip-BGA package design, including high-speed SerDes or MSEE or similar field and 6+ years’ work experience Knowledge of package-level signal integrity and power integrity, to apply to package designs Cadence APD (allegro package designer) experience is preferred.
  • Equivalent tool is OK.
  • Cooperate with our world-wide team (multiple time zones), including co-design with internal team members and external (Vendor) designers Self-management and organization skills Preferred candidates will also have 1 or more years experience with Cadence SKILL for Allegro, or similar design-automation coding experience and interest OTHER REQUIREMENTS This job requires working on-site at the Broadcom office, 5 days a week.
  • This is not a remote-work position.
  • Compensation and Benefits The annual base salary range for this position is USD 121,900.00 To USD 195,000.00 As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth.
  • All subject to relevant plan documents and award agreements.
  • Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time.
  • The company follows all applicable laws for Paid Family Leave and other leaves of absence.
  • We will also consider qualified applicants with arrest and conviction records consistent with local law.
  • If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Tools & Skills

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362 positions
Job ID
/job/USA-CA-San-Jose-Innovation-Drive/Package-Design-Engineer_R026631

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