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About This Role

  • Be part of the Custom Silicon Design Team within Broadcom’s ASIC Products Division in beautiful Fort Collins, Colorado.
  • Join a world-class engineering group developing custom CMOS ASICs for cutting-edge AI, Cellular, Networking, Computing, and Storage products.
  • This position offers the opportunity to work on high-performance SoC designs operating at speeds exceeding 1 GHz, from concept through production.
  • Role Overview This STA Engineering role focuses on chip-level timing architecture, analysis, and closure for advanced ASICs in deep sub-micron technologies.
  • The position provides hands-on experience with the latest 3 nm and smaller process nodes and involves working across multiple design hierarchies to define, validate, and sign off complex timing environments for AI, computing, and networking SoCs.
  • Key Responsibilities Develop, validate, and maintain timing constraints for complex SoC designs across multiple modes and corners.
  • Perform static timing analysis (STA) using industry-standard tools such as Synopsys PrimeTime or Cadence Tempus.
  • Define and execute timing signoff methodologies, including process corners, derates, and uncertainties.
  • Conduct pre- and post-route timing analysis, quality of results (QoR) evaluations, and closure verification.
  • Generate and validate timing ECOs to achieve signoff-quality closure across PVT corners.
  • Automate timing flows and analysis using Tcl and scripting languages such as Perl or Python.
  • Collaborate with physical design, synthesis, and clock teams to ensure timing convergence and cross-domain consistency.
  • Analyze and debug timing violations, signal integrity issues, and clock network challenges.
  • Support power and performance optimization through informed timing analysis and constraint tuning.
  • Ensure full compliance with timing signoff checklists, methodology, and documentation.
  • Technical Skills / Background Deep understanding of VLSI design principles and ASIC physical design fundamentals.
  • Working knowledge of PLLs, clock network design, and timing elements such as flip-flops, latches, and memories.
  • Proficiency in timing constraint creation, debugging, and validation.
  • Strong understanding of RC networks, signal integrity, crosstalk delay, and noise analysis.
  • Familiar with setup/hold analysis, multi-mode multi-corner (MMMC) timing, and ECO convergence.
  • Exposure to advanced STA techniques, including POCV/SOCV/LVF, PBA, and SPICE correlation.
  • Knowledge of timing libraries (CCS/ECSM/NLDM) and multi-input switching (MIS) effects.
  • Coding & Tool Proficiency Strong experience with Tcl scripting and Linux/UNIX environments.
  • Proficiency in Python, Perl, or Ruby preferred.
  • Hands-on experience with Synopsys and/or Cadence STA tools highly desirable.
  • Collaboration and Leadership Excellent communication, analytical, and problem-solving abilities.
  • Ability to work effectively with external customers, cross-functional and global design teams.
  • Skilled at organizing and presenting large data sets, prioritizing tasks, and driving to closure.
  • Demonstrates independent decision-making and strong engineering judgment.
  • Provides technical leadership, mentoring, and initiative in methodology improvements.
  • Education and Experience BS in Electrical or Computer Engineering with 8 + years of relevant experience, or MS in Electrical or Computer Engineering with 6 + years of relevant experience.
  • Compensation and Benefits The annual base salary range for this position is USD 109,700.00 To USD 175,500.00 As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth.
  • All subject to relevant plan documents and award agreements.
  • Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time.
  • The company follows all applicable laws for Paid Family Leave and other leaves of absence.
  • We will also consider qualified applicants with arrest and conviction records consistent with local law.
  • If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

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Broadcom

USA-Colorado-Fort Collins-4380 Ziegler Road

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Open roles at Broadcom
369 positions
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/job/USA-Colorado-Fort-Collins-4380-Ziegler-Road/Design-Engineer---STA_R026968

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