Opens broadcom.wd1.myworkdayjobs.com in a new tab
About This Role
- The candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD (ASIC Product Division)'s designs - DFT Architecture, Test insertion and verification, Pattern generation, Coverage improvement, Post silicon debug and yield improvement to meet the product test metrics.
- It involves working with the Physical Design & STA team for DFT mode timing closure.
- The role could also involve direct interaction with external customers.
- The candidate should have in-depth knowledge of DFT concepts and should be experienced in various aspects of DFT -ATPG, MBIST & IJTAG.
- The candidate should have worked on DFT insertion & verification, pattern generation, coverage improvement, vector simulation, post-silicon debug.
- We will also consider qualified applicants with arrest and conviction records consistent with local law.
- If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
Sourced directly from Broadcom’s career page
Your application goes straight to Broadcom.
Opens broadcom.wd1.myworkdayjobs.com in a new tab
Specialisation
Salary range
₹5-10 LPA to ₹35-58 LPA
Open roles at Broadcom
398 positions
Job ID
/job/IND-Bangalore-Electronic-City---S1/DFT-Staff-Engineer_R025151-2
Get matched to roles like this
Upload your resume once. We’ll notify you when matching roles open up.
Join talent pool — free