Stage Ingénieur : Conception Numérique IP et Circuit Intégrés (F/H)

What You'll Do

• The intern will be in charge of the following tasks: Study of existing solutions used in integrated circuits BMS (Battery Management System).
• Implementation of the solution in synthesizable verilog with the use of the associated tools (syntax and coding rules, logic synthesis, testability, asynchronisms, timing constraints, consumption analysis, silicon area and placement constraints).
• Implementation of a SystemVerilog testbench and verification of the different possible configurations with simulation tools.
• Writing assertions to guarantee the functionality of the IP by formal proof.
• Writing of a document justifying the different RTL design choices as well as an integration guide to facilitate use in a SoC (System on Chip).
• Your Profile BSEE, MSEE preferred, in micro-electronics (digital design).
• Good knowledge in System on Chip (IP design and integration).
• Coding and design with hardware description language.
• Knowhow in verification flow of an ASIC.
• Languages: VHDL or Verilog, SystemVerilog, C or SystemC.
• Tools: logic synthesis and simulation.
• Basic knowledge on Formal Verification.
• Scripting: tcl, python and shell.
• A good level of English is required, working in an international multi-site team.
• More information about NXP in France... #LI-3842