Senior Lead Design Engineer

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What You'll Do

  • /Expectations Leading SOC debug , micro-architecture, and integration of the System on Chip (SOC) from initial specification till tape out and beyond Drive and implement best SoC design methodology/practices and scale it across different business lines.
  • Signing off RTL, timing constraints, CDC, RDC and work with different functions like verification, DFT, synthesis, etc. to get to a production quality Silicon.
  • Documenting the SOC design and micro-architecture for usage by other SOC functions Provide debug design support for any silicon related debugs of chips in post-silicon phase.
  • Specific Knowledge/Skills ASIC designers with experiences in all aspects of RTL design flow from Specification/Micro-architecture definition to design.
  • Experience with Arm Cortex-M/A/R processor-based SoC debug infrastructure handling ARM CoreSight, ETM, STM, DAP, CTI, JTAG, SWD, Trace32, ARM Debug, ARM Trace integration exposure Experience: 5-10 Years in IP/SOC design with successful delivery of production quality chips Good knowledge of Digital Design and hands-on experience with Verilog RTL coding/integration of debug logic Should have a firm understanding and hands-on experience on Chip Assembly, IP Integration, RTL signoff tools and CDC/RDC/Lint/Synthesis.
  • Familiarity with Computer architecture: knowledge of microprocessors (ARM, RISC-V), bus protocols preferred (AXI/ACE/APB/ATB).
  • Knowledge on CPU architecture, Core-sight and peripherals like PCIe, USB, DDRs is highly desirable.
  • Strong domain knowledge of Clocking, Reset, System modes, debug, interconnect, safety, security and other architectures Know-how of Serial Interfaces, Multimedia, External Bus Interfaces Self-motivated to drive issues to closure.
  • Should be a team player and willing to work with cross functional teams on issues resolution.
  • Excellent written and verbal communication skill.
  • Creative problem-solving skills, logic analysis skills, ability to logically break complex problems down to manageable components.
  • More information about NXP in India... #LI-29f4

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/job/Bangalore/Design-Engineer_R-10064874

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