Senior Hardware Verification Engineer

Overview

• The Senior ASIC Hardware Verification Engineer is responsible for planning, developing, and executing verification of ASIC/SoC designs to ensure functional correctness prior to tape-out.
• This includes building UVM-based environments, creating test plans, developing testcases, achieving coverage closure, and debugging complex hardware issues.
• Verification Planning Testbench Development Test Development and Execution Functional Coverage and Closure Assertion-Based Verification More information about NXP in India..