Senior Hardware ASIC Arch/Design Engineer

Overview

• Architecture & Micro-Architecture Define product feature and capabilities and own the architecture for compute, memory, interconnect & high-speed interface subsystems in the AI inference chip.
• Collaborate with software to co-optimize hardware features for AI workloads.
• Collaborate with RTL designers to identify and complex technical issues/risks.
• Review and guide RTL implementation, ensuring consistency with architectural intent and timing/power goals Collaborate with Physical-design teams for Area/Floorplan refinment, Timing targets etc.
• Define and document interface specifications, control/status logic, and pipeline structures.
• Lead PPA analysis and trade-off discussions across RTL and architecture.
• Modelling & Analysis Develop and maintain high-level architecture and performance models.
• Use simulation and architectural models to guide RTL-level improvements.
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