Junior Digital Design Engineer

What You'll Do

• Develop digital sub-circuits related to complex System-on-Chip (SOC) based on pre-defined specification, RTL coding (Verilog/SystemVerilog), synthesis, static timing analysis (STA), formal verification, and power analysis competences.
• Contribute to design for testability (DFT) implementation and verification, debugging skills.
• Collaborate closely with analog, mixed-signal, and software teams to define interfaces, optimize system performance and ensure seamless integration.
• Follow design methodologies shared among the team to guarantee time schedule and satisfy quality targets criteria.
• Perform comprehensive design verification using simulation tools, formal verification techniques, and hardware emulation.
• Participate in post-silicon validation and debug activities, identifying and resolving issues to ensure product quality.
• Generate detailed design documentation, including specifications, test plans, and design reviews.
• Stay abreast of industry trends, emerging technologies, and best practices in digital IC design methodology shared in the team.
• Bachelor’s or Master's degree in Electrical Engineering, Electronics Engineering, or related field.
• Expertise in Verilog/SystemVerilog for RTL design and verification.
• Familiarity with industry-standard EDA tools for RTL coding and synthesis, STA, formal verification.
• Understanding of digital circuits design, timing analysis, power integrity, and low-power design techniques.
• Basic knowledge of UVM is a plus.
• Attitude to problem-solving, attention to details and ability to work in team oriented environment.
• More information about NXP in Italy... #LI-6710