Junior Analog IC Layout Engineer

Nice to Have

• Experience with Cadence Virtuoso.
• Familiarity with Calibre or equivalent physical verification tools.
• Exposure to Analog or Mixed-Signal IC design through academic projects, internships or thesis work.
• Basic Linux knowledge.
• Interest in semiconductor technology, layout automation and AI-assisted engineering solutions. ----------- NXP is committed to equal pay for equal work and work of equal value and applies fair, consistent and transparent remuneration practices.
• As of the date of this posting, the estimated gross annual base salary range for this position in Italy is between 31,200 € and 43,000 € annually.
• This range is intended as a guideline.
• Actual compensation may vary based on qualifications, experience, skills, and specific business or organizational needs.
• This position falls under the applicable National Collective Labour Agreement (Metalmeccanica Industria).
• Where relevant, the total compensation package may also include additional elements such as annual incentive opportunities and/or equity, along with a competitive benefits package.
• More information about NXP in Italy... ----------- #LI-6710