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What You'll Do

  • Work with architecture teams and put up the micro-architecture based on the IP requirements Develop RTL using Verilog/SystemVerilog/VHDL based on micro-architectural specifications Translate system-level requirements into high-quality IP designs Optimize designs for power, performance, and area Perform design checks such as Lint, CDC, synthesis, and STA Drive bug fixing and closure Support design reviews and sign-off processes Collaborate with verification teams on test plans and coverage closure Required skills Strong experience in RTL design (Verilog/SystemVerilog/VHDL) Solid understanding of SoC/IP design and integration Hands-on experience with:Lint, CDC, synthesis, timing analysis Experience in Low-power design techniques Preferred skills Experience in full-cycle IP/SoC development Exposure to formal verification or low-power flows Experience with post-silicon validation and bring-up More information about NXP in India... #LI-29f4

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646 positions
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/job/Bangalore/Digital-IP-Engineer_R-10063817

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