ASIC Verification Engineer - Clocks

Overview

• The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification.
• The NVIDIA Clocks Team is committed to deliver high-quality clocking and reset logic to various units in SOC automotive and datacenter ASICs.
• The complexity of the clocks and resets design has increased many folds.
• This requires sophisticated verification to deliver a bug free clocks/resets design to power our product lines ranging from Data Centers, Consumer graphics to Self-driving cars and the growing field of artificial intelligence.
• Modern clocking verification solutions need to be innovative, ensure quality in covering the complex design specifications and balance the constraints on infrastructure, re-usability, testing speed and multi-platform support.
• What you'll be doing: Own validation of Clocking structures in Tegra automotive and datacenter products from start to finish, including test plan development, automation, validation flows development, coverage metrics, test execution, bug identification/fix and productization.
• Tackle Sophisticated problems and develop a scalable solution that works across platform.
• Hands on industry-standard tools and state of the art verification methodologies.
• This includes coding in SystemVerilog, UVM, C++, Perl, Python and NVIDIA custom compilers and tools.
• Partnering closely with our clocks/reset architecture and design team to validate our clocks/reset design.
• Coordinate with internal and external teams across time zones.
• What we need to see: BS or MS in EE/ECE or equivalent experience.
• 2+ years of relevant industry work experience.
• Good understanding of Logic Design and Architecture.
• Expertise in industry-standard verification flows like SV constraint random verification, UVM, Formal Verification, Coverage metrics, profiling tools, X prop, etc.
• Exposure on block level and system-level verification.
• Strong coding skills in SystemVerilog, scripting languages (Perl/python) and C++.
• Ability to collaborate and work with multiple groups.
• Prior experience in implementing Test plans for pre-silicon platforms.
• Understanding of DFT/IST is optional.
• We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our world-class engineering teams are growing fast.
• If you are creative, curious, and motivated with real passion for technology, we want to hear from you! #LI-Hybrid.