ASIC Design Engineer (RDSS Intern)

Overview

• By submitting your resume, you’re expressing interest in our 2027 RDSS ( Research and Development Substitute Services) program.
• Please confirm your eligibility with the local district office before applying for the role.
• We are looking for an ASIC Design Engineer (RDSS Intern) for our Multimedia IP team in Taiwan.
• You'll develop the latest multimedia IP in our GPU and SOC chips.
• In this position, you'll make a real impact in a dynamic, technology-focused company, and contribute to our world-class technology and powerful legacy.
• What you will be doing: IP level front-end design Co-work with design verification engineers to ensure that the build is functional.
• Analyze build trade-offs and optimize build based on features, requirements, and system limitations.
• Complete task lists, checklists, and deliverables.
• What we need to see: Masters Degree in EE, CS or CE or equivalent work experience.
• Have taken digital build courses.
• Project experience in IC build implementation.
• Proficiency with Verilog and SystemVerilog.
• Proficiency with AI Agent and AI-enabled automation workflows.
• Ability to use AI responsibly and effectively, including validating AI-generated output, protecting sensitive information, and applying sound engineering judgment.
• A proactive, collaborative approach, along with written and verbal interpersonal skills, and the ability to work independently in fast-paced environment.
• Ways to stand out from the crowd: Experience in writing C++/SystemC models.
• Scripting experience in Python, Perl, tcl, Make, shell.