Senior Package Design Engineer

Requirements

• Master's degree in Electrical Engineering, Mechanical Engineering, Materials Science, or a related interdisciplinary field with 5+ years of industry experience in advanced memory substrate design, or Bachelor's degree in a related field with 10+ years of industry experience in advanced memory substrate design.
• Hands-on proficiency with industry-standard EDA tools such as Cadence® Allegro® Package Designer+ / Integrity 3D-IC Platform, Siemens/MentorGraphics Xpedition tool suite, or equivalent advanced package design tools.
• Experience in advanced memory substrate design, including flip chip and wire bond interconnects, BEOL/RDL flows, substrate stack-up, and routing for high-density packages.
• Demonstrated experience partnering with Signal Integrity (SI) and Power Integrity (PI) teams to incorporate simulation analysis and feedback into package architecture definition and design optimization for high-speed memory interfaces.
• Experience collaborating with OSAT partners, assembly engineering teams, and multi-functional global organizations to deliver package designs through HVM.
• Preferred Qualifications 10+ years of industry experience in semiconductor package design, with a focus on advanced DRAM packaging technologies such as LPDDR, HBM, or GDDR, including experience with TSV-based stacking, micro-bump layout, and Chip Package Interaction (CPI) analysis.
• Experience leading co-design engagements with silicon design teams, customers, or business units — including die floorplan optimization, interconnection scheme definition, and package architecture trade-off studies for new product concepts.
• Experience with Assembly DOE definition and management, DFMEA reviews, and process/material development in an HVM environment.
• Proficiency with mechanical drawing tools such as AutoCAD (Autodesk Mechanical) and experience generating package, interposer, and manufacturing drawings.
• Familiarity with advanced packaging platforms such as 2.5D/3D-IC, fan-out wafer-level packaging (FOWLP), or System-in-Package (SiP) and their associated design and manufacturing ecosystems.
• As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth.
• Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future.
• We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.
• Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.
• Additionally, Micron benefits include a robust paid time-off program and paid holidays.
• For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits .
• Micron is proud to be an equal opportunity workplace and is an affirmative action employer.
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• To learn more about Micron, please visit micron.com/careers For US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s People Organization at hrsupport_na@micron.com or 1-800-336-8918 (select option #3) Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.
• Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.
• AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application materials.
• However, all information provided must be accurate and reflect the candidate's true skills and experiences.
• Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.
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