Semiconductor Principal Design Engineer, Non‑Volatile Engineering Group

Requirements

• BS or MS in Electrical Engineering with 8+ years of relevant experience Experience in physical design flows and optimization Proven ownership of blocks from concept -> design -> layout -> signoff -> silicon correlation, Deep expertise in: CMOS analog/mixed-signal circuit design and device physics fundamentals High-speed datapath timing analysis (including nontraditional timing such as wave-pipelined/pulse-based) Layout parasitics and physical implementation impact on circuit behavior Strong simulation and debug skills (SPICE/Fast-SPICE, corner/MC analysis, failure-mode thinking) Experience with managing complex design projects, effectively communicating progress and outcomes Preferred Qualifications Direct experience in NAND datapath and/or DRAM datapath design.
• Wave-pipelining, self-timed, or pulse-latched pipeline design techniques Redundancy/repair architecture experience in dense arrays (including repair timing implications) Experience on DRAM interface(e.g.
• DDR4/5, LPDDR5/6, HBM3/3E/4) as well as other industry standard interfaces.
• Comprehensive understanding on CMOS device and device reliability About Micron Technology, Inc.
• We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all .
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