Principal SoC Design Engineer, HBM

Requirements

• Strong experience in digital SoC design and RTL development.
• Proficiency in SystemVerilog/Verilog and familiarity with SoC integration methodologies.
• Experience with the RTL‑to‑GDS flow, including synthesis, static timing analysis, and design sign‑off considerations.
• Working knowledge of design verification concepts and debug workflows.
• Experience integrating complex IP blocks into large SoCs; familiarity with EDA tools from Cadence, Synopsys, and/or Siemens; programming or scripting experience (e.g., Python, TCL, Perl, or shell scripting); ability to work effectively in a global, cross‑functional engineering environment; strong analytical and problem‑solving skills with attention to detail.
• Preferred Qualifications Experience with HBM, DRAM, or memory‑centric SoC designs.
• Familiarity with high‑speed interfaces, clocking strategies, reset architectures, and power management concepts.
• Exposure to DFT concepts (scan, MBIST, BIRA/BISR) and debug.
• Experience with hardware emulation or acceleration platforms (e.g., Palladium, Veloce, Zebu).
• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field; minimum 10 years of experience in a related field; proven ability to mentor and develop junior engineers.
• As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth.
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