Principal Signal Integrity Engineer, Pathfinding

About the Team

• At Micron, we transform how the world uses information to enrich life for all.
• As a global leader in memory and storage innovation, we develop technologies that accelerate intelligence and enable the next era of AI, ML, and advanced computing.
• Micron’s Interface Pathfinding team operates at the leading edge of that mission — serving as a bridge between corporate strategy and engineering through forward-looking investigation and development of energy-efficient bandwidth solutions.
• Our work spans innovative circuit, signaling, packaging, and interconnect solutions with a 3–5 year technology horizon, grounded in rigorous analysis, hands-on measurement, and a commitment to building a robust intellectual property portfolio.
• As a Principal Signal Integrity Engineer , you will be a core technical contributor on a deliberately small, senior team united around the goal of preparing high-speed interface innovations for high-confidence product adoption.
• What You’ll Work On Micron’s Interface Pathfinding team investigates and validates novel interconnect and signaling solutions for high-speed memory and die-to-die interfaces.
• The signal integrity scope is broad and analytically deep — spanning electrical modeling, channel analysis, and substrate evaluation — with an emphasis on original analysis rather than execution of established playbooks.
• Key signal integrity domains include: Interconnect Modeling — Generating and validating electrical models for packages, substrates, and interconnects used in forward-looking feasibility studies Substrate & Packaging Evaluation — Assessing next-generation substrate technologies and providing strategic direction on their signal integrity implications Channel & I/O Co-Optimization — Performing SI analysis during feasibility studies and driving I/O + channel co-optimization, including coordination with supporting organizations Design Rule Development — Driving progressive design rules that enable package and system-level performance scaling Link Budgeting & Sim-to-Silicon Correlation — Establishing forward-looking link budgets and developing methodologies that connect simulation predictions to measured silicon outcomes What You’ll Own Interconnect Modeling: Own the generation and validation of interconnect models — from field solver extraction through time- and frequency-domain circuit simulation — serving as the authoritative source for model quality on the team.
• Technology Evaluation: Lead SI assessment of forward-looking substrate and packaging technologies, translating physical characteristics into channel performance projections and strategic recommendations.
• Feasibility Analysis: Drive SI analysis during pathfinding studies, including I/O and channel co-optimization, and provide direction to supporting organizations when analysis is distributed.
• Design Rule Definition: Develop and champion progressive package and system-level design rules grounded in electromagnetic analysis and simulation data.
• Link Budgeting: Define forward-looking link budgets and establish the sim-to-silicon correlation methodologies that give the team and product programs confidence in pre-silicon predictions.
• Cross-Disciplinary Engagement: Collaborate across Signal Integrity, Circuit and Chip Design, Packaging R&D, and System Integration — translating SI findings into actionable guidance for partner teams.
• Design Documentation: Author analysis reports, modeling methodology documents, and design rule specifications that serve as the authoritative reference for the team and follow-on programs.
• What You Bring Required MS or PhD in Electrical Engineering or related field (MS with strong electromagnetic/SI fundamentals accepted; PhD preferred but not sufficient on its own — demonstrated hands-on modeling and simulation capability is what differentiates) 10+ years of industry experience in signal or power integrity analysis applied to high-speed interface technologies Extensive experience applying electromagnetic and transmission line theory to SI/PI analysis of differential and single-ended interfaces Extensive experience with time- and frequency-domain simulation tools — ADS, HSPICE, SPECTRE, or equivalent Deep experience with electromagnetic field solvers — Q3D, SIWAVE, HFSS, or equivalent — including solver setup, mesh strategy, and result validation Working knowledge of hardware measurement tools — oscilloscopes, TDR, VNA — and their application to SI characterization Comfortable with broad ownership, cross-discipline collaboration, and making analytical decisions with real program consequences Strong written and verbal communication skills — this role produces modeling reports, link budgets, and design rule documents Preferred Familiarity with memory I/O architectures and their signal integrity constraints Experience with advanced packaging technologies — 2.5D/3D integration, embedded die, or high-density organic substrates — and their electromagnetic modeling challenges Post-silicon characterization experience — correlating simulation predictions to measured TDR, insertion loss, eye diagrams, or BER results Some familiarity with modeling optical links Willingness to learn and apply Artificial Intelligence -based methods to streamline modeling and simulation workflows Prior experience in a pathfinding or advanced development environment where analysis methodology is actively developed, not inherited Why This Role You will do original signal integrity analysis on problems that matter — developing the interconnect models and channel solutions that define what high-speed memory and die-to-die interfaces can achieve.
• You will work alongside genuinely exceptional engineers — spanning analog design, chip design, packaging R&D, and system integration — in an environment where SI analysis directly shapes architectural decisions.
• The team is intentionally small and senior — decisions get made quickly, bureaucracy is minimal, and your technical judgment will be trusted.
• You are joining an active program with real momentum — your analytical leadership will directly shape its trajectory and scope.
• This is a long-term opportunity — strong execution early creates compounding impact as the program scales.
• A Note to All Candidates This role is part of a deliberate effort to build a long-term, high-caliber team around a compelling high-speed interface technology program.
• We are looking for engineers who want to own something, build something, and grow with a program .
• If that description resonates, we’d like to hear from you.
• The US base salary range that Micron Technology estimates it could pay for this full-time position is: $119,000.00 - $320,000.00 a year Additional compensation may include benefits, bonuses and equity.
• Our salary ranges are determined by role, level, and location.
• The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations.
• Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training.
• The pay scale is subject to change depending on business needs.
• Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
• Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits.
• As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth.
• Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future.
• We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.
• Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.
• Additionally, Micron benefits include a robust paid time-off program and paid holidays.
• For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits .
• Micron is proud to be an equal opportunity workplace and is an affirmative action employer.
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• To learn more about Micron, please visit micron.com/careers US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s People Organization at hrsupport_na@micron.com or 1-800-336-8918 (select option #3) Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.
• Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.
• AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application materials.
• However, all information provided must be accurate and reflect the candidate's true skills and experiences.
• Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.