Staff Design Verification Engineer- SerDes / AMS / mixed‑signal IPs

What You'll Do

• Execute and own verification activities for SerDes / AMS / mixed‑signal IPs across advanced technology nodes (5nm, 3nm, 2nm). • Develop and maintain UVM‑based testbenches , sequences, checkers, and coverage models. • Verify high‑speed interfaces such as PCIe, Ethernet, DDR, D2D, and related PHY components (PAM4/PAM2 where applicable). • Contribute to verification of calibration, link training, power modes, and firmware‑driven flows . • Debug failures across RTL, AMS models, VIPs, and testbench infrastructure . • Analyze regressions, improve stability, and drive functional, code, and coverage closure . • Collaborate closely with Design, AMS, Firmware, and Architecture teams to resolve issues and clarify intent. • Assist with GLS bring‑up, power‑aware verification, and timing‑related checks , under guidance. • Follow and contribute to verification methodologies and best practices defined by the team. • Actively learn and adopt new tools, flows, and technologies used within Central Engineering.
• What We're Looking For Education: • Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 5-7 years of related professional experience. or Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 6 to 9 years of experience. in verification and/or AMS/mixed‑signal design environments . • Strong hands‑on experience with SystemVerilog and UVM . • Working knowledge of: • SerDes or PHY architectures • AMS / mixed‑signal concepts • Register modeling and firmware interaction • Experience integrating or using verification IPs (VIPs) . • Ability to debug issues across multiple abstraction layers with guidance. • Familiarity with regression management and coverage analysis.
• Behavioral & Growth Expectations • Demonstrates strong ownership of assigned verification areas. • Executes tasks independently with attention to quality and detail . • Communicates progress, issues, and technical findings clearly to the team. • Actively seeks to deepen domain knowledge and technical breadth . • Willingness to learn from senior engineers and accept feedback. • Begins contributing beyond tasks by suggesting incremental improvements to testbenches, checks, or flows.
• Nice‑to‑Have / Growth Differentiators • Exposure to AMS verification tools and modeling techniques . • Experience with link training, calibration logic, or DSP‑analog interaction . • Basic exposure to GLS, low‑power verification, or post‑silicon debug . • Interest in automation, scripting, or productivity improvements.
• Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity.
• We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us.
• For additional information on what it’s like to work at Marvell, visit our Careers page.
• Interview Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
• These tools must not be used to record, assist with, or enhance responses in any way.
• Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time.
• Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
• This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR).
• As such, applicants must be eligible to access export-controlled information as defined under applicable law.
• Marvell may be required to obtain export licensing approval from the U.S.
• Department of Commerce and/or the U.S.
• Department of State.
• Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-RV1