Senior Staff Design Verification Engineer – PCIE/CXL Sub-System

Nice to Have

• Experience with assertion-based verification (SVA) Exposure to performance modeling and traffic generation Exposure to emulation platforms (e.g., Palladium, Veloce) a plus Scripting skills (Python/Perl/Shell) Experience with low-power verification (UPF) Develop and execute verification plans for high-speed memory interfaces (PCIE 6/7, CXL 3.2/4.0) Build and enhance UVM/SystemVerilog-based verification environments Develop test benches, sequences, and checkers for functional and performance validation Perform protocol-level verification for PCIE controllers and PHY interfaces Analyze and debug simulation failures, identify root causes, and drive resolution Work closely with design, architecture, and firmware teams to ensure coverage closure and spec compliance Contribute to coverage-driven verification (CDV) including functional, code, and assertion coverage Support emulation/FPGA validation and post-silicon bring-up (nice to have) Review design specifications and provide feedback for testability and robustness Expected Base Pay Range (USD) 135,900 - 201,130, $ per annum The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.
• The expected base pay range for this role may be modified based on market conditions.
• Additional Compensation and Benefit Elements Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments.
• Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition.
• Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones.
• We look forward to sharing more with you during the interview process.
• Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com .
• Interview Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
• These tools must not be used to record, assist with, or enhance responses in any way.
• Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time.
• Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
• This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR).
• As such, applicants must be eligible to access export-controlled information as defined under applicable law.
• Marvell may be required to obtain export licensing approval from the U.S.
• Department of Commerce and/or the U.S.
• Department of State.
• Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-JT2