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What You'll Do
- will include but not be limited to: Lead the design and supervise the layout of custom memory cells, arrays, and peripheral circuits, focusing on performance, power, and area optimization.
- Conduct comprehensive circuit simulations to ensure functionality, timing, and robustness across process, voltage, and temperature.
- Custom circuit schematic and cross-section entry using Cadence Virtuoso design tools.
- Characterize custom SRAM for view development.
- Identify and propose innovative solutions to enhance power-performance-area metrics.
- Partner with the Hardware and Silicon Validation Team for silicon evaluation and root cause Model to Hardware Correlation (MHC) issues.
- Develop and improve design methodologies, flows, and scripts to enhance productivity and quality.
- Analyze, summarize, document, and present results effectively.
- What We're Looking For Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. 10+ years of hands-on experience in digital circuit design, with a focus on custom memory and transistor-level digital circuit design in advanced CMOS technologies.
- Experience with various SRAM architectures (e.g., 6T, 8T, multi-port, pseudo-2-port) Proficiency in industry-standard EDA tools (e.g., Cadence Virtuoso, SpectreX, QuantusQRC parasitic extraction).
- Familiarity with statistical analysis methods.
- Ability to work effectively in a collaborative team environment.
Nice to Have
- Experience with custom SRAM or DRAM design and characterization.
- Ability to work independently and manage project deadlines effectively.
- Strong verbal and written communication skills.
- Knowledge of physical design processes and tools.
- Expected Base Pay Range (USD) 160,400 - 237,320, $ per annum The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.
- The expected base pay range for this role may be modified based on market conditions.
- Additional Compensation and Benefit Elements Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments.
- Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition.
- Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones.
- We look forward to sharing more with you during the interview process.
- Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com .
- Interview Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
- These tools must not be used to record, assist with, or enhance responses in any way.
- Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time.
- Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
- This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR).
- As such, applicants must be eligible to access export-controlled information as defined under applicable law.
- Marvell may be required to obtain export licensing approval from the U.S.
- Department of Commerce and/or the U.S.
- Department of State.
- Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-TD1
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