Principal Silicon Validation Engineer

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Overview

  • About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world.
  • Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
  • At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow.
  • For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
  • Your Team, Your Impact Validation Engineer: Responsible for bring up, debug and characterize silicon level Marvell’s internal IPs such as High-Speed SerDes, PLL/DLL, ADC, etc. in various Marvell products.
  • Evaluate and debug new features in PHY, develop driver firmware, collect performance data, and resolve application/production issues including SAS and PCIe products.
  • Support internal SoC, FAE and ATE team on testing and system level debugging.
  • Provide direct technical support to top tier customers and work with them to review designs, discuss questions and help tune performance to meet system requirement.
  • Work includes but not limited to develop and execute bench level validation test plans, develop script to automate testing, generate appropriate test report and write application notes.
  • Provide technical support to customers.
  • Act as a primary technical interface between the company and customers.
  • Qualify design activity at the customer engineering level and participate in the definition of new products and the identification of niche areas that present new opportunities for Marvell.
  • Make new product recommendations to Design/Marketing teams at Marvell.
  • What You Can Expect .
  • Responsible for bring up, debug and characterize silicon level Marvell’s internal IPs such as High-Speed SerDes, PLL/DLL, ADC, etc. in various Marvell products.
  • Evaluate and debug new features in PHY, develop driver firmware, collect performance data, and resolve application/production issues including SAS and PCIe products.
  • Support internal SoC, FAE and ATE team on testing and system level debugging.
  • Provide direct technical support to top tier customers and work with them to review designs, discuss questions and help tune performance to meet system requirement.
  • Develop and execute bench level validation test plans, develop script to automate testing, generate appropriate test report and write application notes.
  • Provide technical support to customers.
  • Act as a primary technical interface between the company and customers.
  • Qualify design activity at the customer engineering level and participate in the definition of new products and the identification of niche areas that present new opportunities for Marvell.
  • Strategize and communicate new product recommendations to Design/Marketing teams at Marvell.
  • Oversee and manage all aspects of projects, from conception to completion.
  • Ensure that each project meets its individual goals and objectives.
  • What We're Looking For As a Principal Silicon Validation Engineer at Marvell, you’ll be helping to deliver high bandwidth over long distances.
  • This team performs analog validations on amplifiers that drive optical electronic devices and receivers.
  • We also validate silicon photonics, do upper electronic measurements and support the coherent digital signal programming unit.
  • This is a niche area at Marvell, working with cutting edge technologies used by many internal and external customers around the world.

Benefits

  • Elements At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package.
  • That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer.
  • Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.
  • Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com .
  • Interview Integrity As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.
  • Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time.
  • If a candidate uses such tools during an interview, they will be disqualified from the hiring process.
  • This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR).
  • As such, applicants must be eligible to access export-controlled information as defined under applicable law.
  • Marvell may be required to obtain export licensing approval from the U.S.
  • Department of Commerce and/or the U.S.
  • Department of State.
  • Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-NF1

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Marvell Technology

Santa Clara, CA

Specialisation
Open roles at Marvell Technology
503 positions
Job ID
/job/Santa-Clara-CA/Principal-Silicon-Validation-Engineer_2502218

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