Ph.D. Intern - Analog, Mixed Signal & Circuit Design

3 LocationsAnalog/MSVery High demand

Opens marvell.wd1.myworkdayjobs.com in a new tab

Nice to Have

  • Experience designing in FinFET process nodes (7nm, 5nm, 3nm, or equivalent) Familiarity with high-speed serial link architectures, optical transceiver circuits, or Die-to-Die interconnect design Exposure to layout-aware design, parasitic extraction, or post-layout simulation Experience with behavioral modeling in Verilog-A or similar Expected Base Pay Range (USD) 38 - 76, $ per hour.
  • The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.
  • The expected base pay range for this role may be modified based on market conditions. 
This role is eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers, ensuring you are rewarded for your contributions and remain invested in the company's long-term success.
 Additional Compensation and Benefit Elements Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments.
  • Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition.
  • Highlights for our interns: medical, dental, and vision coverage, perks and discounts, robust mental health resources to prioritize emotional well-being, and paid holidays.
  • Additional compensation may be available for intern PhD candidates.
  • We look forward to sharing more with you during the interview process.
  • Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com .
  • Interview Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
  • These tools must not be used to record, assist with, or enhance responses in any way.
  • Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time.
  • Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
  • This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR).
  • As such, applicants must be eligible to access export-controlled information as defined under applicable law.
  • Marvell may be required to obtain export licensing approval from the U.S.
  • Department of Commerce and/or the U.S.
  • Department of State.
  • Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-SC1

Tools & Skills

Sourced directly from Marvell Technology’s career page

Your application goes straight to Marvell Technology.

Specialisation
Salary range
₹4-10 LPA to ₹40-75 LPA
Open roles at Marvell Technology
170 positions
Job ID
/job/Santa-Clara-CA/PhD-Intern---Analog--Mixed-Signal---Circuit-Design_2604142

Get matched to roles like this

Upload your resume once. We’ll notify you when matching roles open up.

Join talent pool — free

Similar Analog/MS roles