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What You'll Do
- will include: Read and understand design specifications, and help create test plans and coverage plans.
- Study the existing coverage group definitions and test cases, then write new tests, including constrained-random tests, to improve coverage.
- Run simulations, understand how the block under test operates, and debug failures.
- Work toward coverage improvement and closure.
- Contribute to improvements in the DV strategy, flow, and scripts.
- Collaborate with design engineers to resolve issues, and document your verification results.
- What We're Looking For Currently pursuing a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or Electrical & Computer Engineering (expected to graduate in 2027 or 2028) Familiar with Verilog and SystemVerilog.
- Strong debugging and problem-solving skills, and the ability to work well in a team.
- Nice to Have Knowledge of UVM.
- Experience with scripting languages such as Python or Perl, and a Linux working environment.
- Understanding of digital design fundamentals and mixed-signal design concepts. 

 Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity.
- We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us.
- For additional information on what it’s like to work at Marvell, visit our Careers page.
- Interview Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
- These tools must not be used to record, assist with, or enhance responses in any way.
- Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time.
- Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
- This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR).
- As such, applicants must be eligible to access export-controlled information as defined under applicable law.
- Marvell may be required to obtain export licensing approval from the U.S.
- Department of Commerce and/or the U.S.
- Department of State.
- Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-HP1
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Specialisation
Salary range
₹5-12 LPA to ₹40-70 LPA
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299 positions
Job ID
/job/VN---Da-Nang/Design-Verification-Intern_2604466
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