SoC RTL Verification Intern

About This Role

• Responsible for verifying architectural functional blocks of IP or SOC, including creating test cases and test benches using UVM methodology. - Develop pre-silicon validation tests to ensure systems meet design requirements o Perform RTL and GLS simulation o Create RTL validation test plans, run system simulations, and resolve failed tests o Build infrastructure for regressions and volume validation o Document test plans across platforms (IP library, Complex-IPs, Subsystems) o Contribute to verification methodology and infrastructure o Adopt and implement industry-standard verification tools and methodologies (Formal, Low Power, Performance, Co-Simulation) Qualifications: o Bachelor's or Master's in Microelectronics, Electrical/Computer Engineering, or Computer Science o Proficient in SystemVerilog/Verilog and scripting languages o Pre-Si verification experience with x86, ARM, and RISC cores o Familiarity with NOC, AXI, AHB/APB interfaces o Effective in fast-paced, collaborative teams o Excellent verbal and written communication o Self-motivated and goal-oriented Job Type: Student / Intern Shift: Shift 1 (China) Primary Location: PRC, Shanghai Additional Locations: Business group: Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.