Silicon Packaging Design Engineer

About This Role

• Join our team as a Silicon Packaging Design Engineer in the Data Center Group, where you will play a pivotal role in crafting cutting-edge silicon packaging solutions that drive Intel's innovation and technological leadership.
• In this role, you will be engaged in the end-to-end development of substrate designs, from concept to tapeout, ensuring optimized performance and manufacturability.
• Collaborating closely with cross-functional teams, your contributions will directly impact product quality, cost efficiency, and time-to-market for Intel's next-generation technologies.
• This is an exciting opportunity to start your career in a collaborative environment that fosters learning and professional growth.
• Key Responsibilities - Drive the complete development of substrate designs, starting from initial concept through tapeout. - Perform physical layout and routing of package designs, ensuring adherence to design requirements. - Conduct substrate fit and routing studies to establish optimal tradeoffs between design, performance, and cost. - Collaborate with silicon and hardware teams to optimize silicon-package-board performance and pinout configurations. - Define and implement substrate design rules to meet product and manufacturing requirements. - Perform internal and external design reviews, analyze data, and resolve design rule violations (DRCs). - Integrate design documentation and collateral into the product lifecycle management system. - Continuously seek opportunities to improve package design for manufacturability (DFM) and quality assurance.