Senior Hardware Design Engineer

About This Role

• Intel Central Engineering Group (CEG) team delivers best-in-class Ethernet products and is at the heart of Intel's transformation from a PC company to a company that powers the cloud and billions of smart, connected computing devices.
• CEG's compelling Ethernet products move the world's data and are the foundations of cloud service and telecommunications data centers.
• You will be exposed to High-Speed I/O protocols such as PCIeGen6-7, DDR5-6, and PAM4 Ethernet 224Gb, which are a part of our Ethernet Infrastructure Processing Unit (Intel IPU) and Foundation NIC (FNIC) Ethernet product lines.
• We propose a dynamic and flexible workplace position, working directly with highly capable design, system, and pre/post-silicon teams within the organization.
• Most of the team's engineers have 10+ years of experience, and we are looking for a highly skilled multidisciplinary engineer with proven experience in electrical and system engineering to lead the hardware design of our next division projects' challenges and be part of Ethernet networking's accelerated growth.
• The role requires high-frequency signal and power integrity and a good understanding of RF circuits and electromagnetic wave propagation.
• It includes learning the specifications of each interface and the required design limitations that should be verified.
• You will lead a team of developers and develop yourself digital and analog circuit boards for use in HW-Engineering products.
• In this position, your responsibilities include but are not limited to developing board design from schematic through leading the Silicon power-on hardware enablement and debug and may interface with other board design and test module development teams to drive innovation initiatives.
• You would also be responsible for identifying/qualifying new hardware solutions; providing technical leadership to working groups/task forces to resolve hardware, schematics, layout, and DFx issues through debugging and reviews; and part/component selection management.