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About This Role
- Advanced Design and Foundational IP (ADFIP) is part of Design Technology Platform (DTP) under Foundry Technology Development.
- ADFIP's core focus is design-technology co-optimization (DTCO), system-design co-optimization (STCO) and foundational IP development to support Intel technology development, internal client/server/NEX products and external tier0/tier1 customers.
- The organization develops logic libraries, memories, high-speed I/Os, analog and mixed signal IPs, RF/mm Wave circuits and 3D IC, and conducts comprehensive Si validation on process and package development test vehicles and FIP characterization vehicles.
- Advanced power, performance and area (PPA) analysis are conducted across domains to guide silicon and packaging technology definition to maximize technology PPA entitlement and minimize process risks and cost.
- As a process technology design engineer, you will be responsible for creating methodologies, models, and flows for advanced design rules for a specific process node and characterizes those models through silicon validation.
- Ensures IP and SoC design meets requirements and standards for a specific manufacturing process technology.
- Identifies ways to optimize silicon designs by evaluating device performance over a range of operating conditions.
- Resolves prototype issues and determines whether problems are design or process related.
- Conducts experiments to identify potential challenges in the process and ensure that the process meets yield, quality, and reliability standards.
- Drives continuous improvements to enhance the designs, materials, and methodologies.
- Disseminates process development information to design groups, ensures it meets future product requirements, and extracts necessary technical and device performance data for IP and SoC designs.
- Works with IP and SoC design teams to capture and optimize process requirements to enable competitive designs and products.
Requirements
- to be initially considered for this position.
- Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
- Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
- Minimum Qualifications Bachelors with 6+ years of experience or master's degree in electrical engineering, Computer Engineering, or Computer Science with 4+ years of industry experience or PhD. with 2+ years of experience. 3+ years of experience with the following technical skills: Working knowledge of digital design and signoff.
- Able to independently complete Netlist RTL-GDS place and route (APR), signoff tasks.
Nice to Have
- Strong technical understanding of semiconductor technology.
- Working knowledge on Intel's leading process design rules.
- Experience in working with BOTH Cadence and Synopsys EDA tool/flow Demonstrated ability to work independently in a fast-paced environment.
- Experience in optimizing PPA for low power designs such as GPU/AI Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations: US, Arizona, Phoenix, US, California, Folsom, US, California, Santa Clara, US, Texas, Austin Business group: Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly.
- We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments.
- Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.
- It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
- Find out more about the benefits of working at Intel .
- Annual Salary Range for jobs which could be performed in the US: $164,470.00-269,100.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations.
- Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
- Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Sourced directly from Intel’s career page
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₹5-11 LPA to ₹38-65 LPA
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/job/US-Oregon-Hillsboro/Physical-Design-Methodology-Engineer_JR0284644
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