Physical Design Engineer

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About This Role

  • The Role and Impact Join Intel's HIPD - SAM group as a Physical Design Engineer, where you will play a pivotal role in shaping high-speed mixed-signal IP designs that power Intel's innovations across server, client, and graphics microprocessors.
  • In this dynamic position, you will collaborate with architects, logic designers, and analog engineers to implement complex features from RTL to GDS.
  • Your contributions will directly impact Intel's leadership in advanced semiconductor technologies, driving next-generation computing platforms and delivering groundbreaking performance improvements.
  • Key Responsibilities - Create a design database that is ready for manufacturing and has completed sign-off flows. - Conduct power supply and power grid planning and analysis to ensure robust power delivery networks. - Perform logic synthesis, place-and-route, and clock tree synthesis using industry-standard tools like Synopsys and Cadence. - Execute verification processes, including formal equivalence verification (FEV), static timing analysis (STA), and physical verification (LVS, DRC, and antenna checks). - Optimize designs to enhance parameters such as power, frequency, and area while ensuring high reliability. - Conduct power integrity analysis (IR/RV) and implement techniques for power reduction. - Debug and resolve integration issues at the SoC level, collaborating across teams to ensure seamless operation. - Participate in design reviews and manage sign-off flows for manufacturing readiness. - Develop and improve physical design methodologies and flow automation processes.

Requirements

  • Bachelor's degree in Electrical Engineering or Electronics Engineering with 0-1+ years of relevant experience, or a Master's degree in Microelectronics/VLSI with 0 years of relevant experience per business needs. - Proficiency in industry-standard EDA tools such as Synopsys Design Compiler, Cadence Innovus, and Prime Time for physical design. - Knowledge of physical design flows and methodologies, including RTL-to-GDS implementation. - Familiarity with static timing analysis, layout verification processes, and reliability verification techniques.
  • Preferred Qualifications - Foundational understanding of complementary MOS (CMOS) circuit design principles. - Knowledge of digital logic optimization and trade-offs in circuit design related to power, performance, and area. - Experience with low-power implementation techniques and multiple power domain analysis. - Coursework or hands-on practice with Very Large-Scale Integration (VLSI) design and physical design flows. - Strong analytical skills, effective communication, and a continuous-learning mindset.
  • We invite you to bring your expertise to Intel and help us drive innovation, transform industries, and shape the future of computing technology.
  • Apply now to be part of our mission to deliver world-class products and solutions.

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Intel

India, Bangalore

Specialisation
Salary range
₹5-11 LPA to ₹38-65 LPA
Open roles at Intel
97 positions
Job ID
/job/India-Bangalore/Physical-Design-Engineer_JR0284068-1

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