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About This Role
- The Role and Impact: As a Process Design Kit (PDK) Engineer, you will play a pivotal role in developing and ensuring the quality of PDK collateral that enables cutting-edge silicon designs.
- You will be responsible for maintaining and validating design environments for specific technology nodes, working on parasitic extraction, physical verification, and design methodologies to set the foundation for high-quality, efficient design flows.
- This role is integral to advancing Intel's product lines and ensuring seamless collaboration across design and manufacturing teams.
What You'll Do
- Develop and maintain PDK collateral, including Metal R and C extraction, runsets, LVS , physical design verification decks, and modeling transistors for silicon designers. - Perform validation for PDK libraries, ensuring compliance with design rules and correct implementations for advanced process nodes. - Build test structures and simulate physical verification, parasitic extraction, and device modeling to deliver high-quality design solutions. - Collaborate with stakeholders to resolve PDK-related issues, including debugging, root cause analysis, and error dispositioning. - Drive automation and scalability by developing QA methodologies and tools to enhance coverage across technology nodes. - Partner with EDA vendors to enable new tool functionalities and improve design workflows. - Document and deliver design flows, guidelines, and tutorials to optimize usability for internal and external design communities. - Engage with cross-functional teams to support new process development and ensure ease of use for the design ecosystem.
Requirements
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, with 12+ years of experience; OR Master's degree with 10+ years of experience; OR Ph.D. with 8+ years of experience in PDK development and validation. - Hands-on expertise in physical verification tools such as Calibre, Pegasus, or ICV, and parasitic extraction tools such as StarRC or QRC. - Proficiency in scripting languages such as Python, TCL, or PERL for automation and workflow optimization. - Demonstrated experience with PDK enablement for advanced process nodes, including device modeling and layout verification methodologies.
Nice to Have
- Familiarity with reliability verification techniques, including EM/IR flows and ESD concepts. - Knowledge of CMOS device physics, process technology, and design rules. - Experience with 3DIC flow methodologies and low-power techniques. - Strong organizational, presentation, and communication skills to collaborate effectively with cross-functional teams and vendors.
- We're looking for innovative, detail-oriented individuals who thrive in dynamic environments and are eager to make a meaningful impact on Intel's design technology platform.
- Join us and be part of a team that drives technological excellence and shapes the future of semiconductor innovation.
Sourced directly from Intel’s career page
Your application goes straight to Intel.
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Specialisation
Open roles at Intel
627 positions
Job ID
/job/India-Bangalore/PDK-Engineer-Extraction-Development_JR0286519
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