LVS Runset Development Engineer

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About This Role

  • "We are looking for a LVS Runset Development Engineer to develop and Validate LVS rule decks.
  • The role involves working closely with PDK Team and foundry to implement LVS runsets and ensure design compliance.
  • Key Responsibilities: • Rule Development: Development and QA support of LVS/extraction runset for Intel's process. • Multi-Tool Integration: Develop and optimize verification flows across multiple EDA environments, ensuring consistency in results between ICV, Calibre and Pegasus tools. • Cross-Functional Collaboration: Work closely with Device Physicists, Process Integration Engineers, and Analog Designers. • Debug and Analysis: Provide expert-level support to design teams in debugging LVS issues. • Automation: Develop scripts (Python, SKILL, Tcl, or Perl) to automate the execution, reporting, and tracking across different design versions. • Documentation: Maintain detailed documentation and create guidelines for designers to implement correct-by-construction layouts.

Qualifications

  • Required Skills: • Experience with LVS runset development. • Familiarity with SVRF, TVF, Python or Tcl scripting. • Strong debugging and problem-solving skills. • Knowledge of Linux and scripting (Python/Shell/Tcl) is desirable. • Experience with advanced technology nodes is an advantage. • Team player and be able to work with global teams.

Nice to Have

  • Bachelor's degree with 10+ years of experience, OR • Master's degree with 8+ years of experience, OR • PhD degree with 2+ years of experience in LVS runset development or related field; semiconductor industry experience. • Basic AI experience is an added skill.

Tools & Skills

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Intel

India, Bangalore

Specialisation
Open roles at Intel
590 positions
Job ID
/job/India-Bangalore/LVS-Runset-Development-Engineer_JR0286746-1

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