Opens intel.wd1.myworkdayjobs.com in a new tab
About This Role
- "We are looking for a LVS Runset Development Engineer to develop and Validate LVS rule decks.
- The role involves working closely with PDK Team and foundry to implement LVS runsets and ensure design compliance.
- Key Responsibilities: • Rule Development: Development and QA support of LVS/extraction runset for Intel's process. • Multi-Tool Integration: Develop and optimize verification flows across multiple EDA environments, ensuring consistency in results between ICV, Calibre and Pegasus tools. • Cross-Functional Collaboration: Work closely with Device Physicists, Process Integration Engineers, and Analog Designers. • Debug and Analysis: Provide expert-level support to design teams in debugging LVS issues. • Automation: Develop scripts (Python, SKILL, Tcl, or Perl) to automate the execution, reporting, and tracking across different design versions. • Documentation: Maintain detailed documentation and create guidelines for designers to implement correct-by-construction layouts.
Qualifications
- Required Skills: • Experience with LVS runset development. • Familiarity with SVRF, TVF, Python or Tcl scripting. • Strong debugging and problem-solving skills. • Knowledge of Linux and scripting (Python/Shell/Tcl) is desirable. • Experience with advanced technology nodes is an advantage. • Team player and be able to work with global teams.
Nice to Have
- Bachelor's degree with 10+ years of experience, OR • Master's degree with 8+ years of experience, OR • PhD degree with 2+ years of experience in LVS runset development or related field; semiconductor industry experience. • Basic AI experience is an added skill.
Sourced directly from Intel’s career page
Your application goes straight to Intel.
Opens intel.wd1.myworkdayjobs.com in a new tab
Specialisation
Open roles at Intel
590 positions
Job ID
/job/India-Bangalore/LVS-Runset-Development-Engineer_JR0286746-1
Get matched to roles like this
Upload your resume once. We’ll notify you when matching roles open up.
Join talent pool — freeSimilar Other roles
Samsung Semiconductor
Technical Director, Large-Scale AI Model Inferencing
San Jose, California, United States|Other
Samsung Semiconductor
Technical Account Manager, DRAM Business Enablement
San Jose, California, United States|Other
Samsung Semiconductor
Staff Engineer, Storage Product Planning
San Jose, California, United States|Other
Samsung Semiconductor
Staff Engineer, Storage Business Enablement
San Jose, California, United States|Other