LLM & Agentic AI Performance Engineer

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The Role and Impact: Join Intel's Data Center AI organization and help shape how LLM and Agentic AI workloads perform on Intel platforms.
Our team operates at a unique intersection of core performance optimization, AI frameworks, and customer-facing AI solutions.
We bridge the gap between teams that deeply understand silicon and benchmarking and teams building real-world AI solutions, turning performance insights into software optimizations that developers and customers can use.
In this role, you will own end-to-end performance characterization and optimization of LLM and Agentic AI workloads, from Python-level frameworks and inference runtimes down to Linux, system architecture, and hardware performance counters.
This is not simply a benchmarking role.
Benchmarking tells us what the number is.
Your job is to understand why the number is what it is, identify the hardware or software bottleneck, and determine what needs to change to remove it.
Your work will translate into code contributions, framework optimizations, best-known configurations (BKCs), customer-ready solutions, and insights that help influence future Intel hardware and software.
If you enjoy working across the complete AI stack, from agent frameworks and LLM serving engines to NUMA, memory bandwidth, cache behavior, and silicon counters, this role provides an opportunity to work at that intersection.

· Characterize and optimize LLM and Agentic AI workloads across the complete software and hardware stack. · Identify performance bottlenecks across AI frameworks, inference runtimes, operating systems, memory, compute, and platform architecture. · Design and develop hardware-aware and hardware-agnostic optimizations for AI frameworks and runtimes. · Optimize LLM inference techniques including KV-cache management, attention, continuous batching, and quantization. · Work hands-on with serving stacks such as vLLM, SGLang, TGI, or equivalent technologies. · Analyze host and accelerator performance using tools such as VTune, EMON/PMU, perf, top-down analysis, and roofline modeling. · Debug complex performance issues spanning Python frameworks, native code, Linux, runtime libraries, and hardware. · Convert performance findings into software changes, upstream contributions, BKCs, and reusable optimization guidance. · Collaborate with open-source communities to upstream and integrate performance improvements.
Translate silicon-level findings into actionable recommendations for framework developers, while bringing application and framework insights back to Intel platform and silicon teams.

· BE +10 years / M.Tech +8 years in Computer Science, Computer Engineering, Electrical Engineering, or a related discipline. · Significant hands-on experience in performance engineering, systems optimization, or workload characterization on server-class platforms. · Demonstrated ability to identify complex performance bottlenecks and deliver measurable performance improvements. · Strong programming skills in Python and C++, or equivalent systems programming experience in C/Rust. · Strong understanding of server architecture including cache hierarchy, memory bandwidth, NUMA, interconnects, and system-level performance behavior. · Hands-on experience with Linux performance and system technologies such as affinity, huge pages, cgroups, eBPF, ftrace, perf, or equivalent tools.

· Deep understanding of LLM inference, including KV-cache, paged attention, continuous batching and quantization such as INT8, INT4, or FP8. · Hands-on experience modifying or optimizing AI serving stacks such as vLLM, SGLang, TGI, OpenVINO, or equivalent. · Experience building, profiling, or optimizing Agentic AI systems using technologies such as LangGraph, CrewAI, AutoGen, MCP-based frameworks, or similar platforms. · Experience with hardware counter-level performance analysis using VTune, EMON/PMU, perf, top-down analysis, or roofline modeling. · Contributions to significant open-source projects, including upstream code contributions. · Ability to communicate across abstraction layers, translating silicon-level findings for software developers and application-level requirements for hardware architects.
Why Join This Team? This role gives you the opportunity to work across boundaries that few engineering positions span: Agentic AI & LLMs → AI frameworks → inference runtimes Linux → server architecture → silicon You won't be limited to measuring performance or optimizing an isolated component.
You'll help connect the entire stack, identify where the real bottlenecks are, implement improvements, and make those optimizations available to developers and customers.
The result is tangible: better AI performance today, stronger software solutions for customers, and insights that can influence tomorrow's Intel platforms.

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