Layout Design Intern

About This Role

• This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to be considered for this position.
• As a Layout Design Intern, you will be part of a high impact engineering team contributing to the development of next generation semiconductors.
• In this role, you will support layout implementation of custom IP blocks and APR partitions.
• You will work on assignments that are complex, nonstandard, and require strong technical judgment within broadly defined design parameters.
• Responsibilities will include but are not limited to: Execute physical layout design tasks while ensuring adherence to best in class design practices and efficiency standards.
• Independently assess, plan, and drive complex layout design assignments from definition through completion.
• Collaborate with senior engineers to develop layout methodologies, automation scripts, and custom macros (experience or interest in scripting is a plus).
• The ideal candidate must show the following behavioral traits: Eagerness to learn and apply new technical concepts.
• Proactive, ownership and accountability for assigned tasks.
• Willing to work effectively in a team-oriented environment.
• Organized, focused on managing multiple tasks.
• Open to feedback and continuous improvement.
• What you will learn: Advanced VLSI layout methodologies used in modern CPU development.
• Physical implementation flows, including floor planning, routing, design rule checks (DRC), and layout vs. schematic verification (LVS).
• EDA tools and automation, learning how to optimize layout productivity and quality through scripting and custom methodologies.
• Microprocessor architecture fundamentals and how physical design impacts power, performance, and area (PPA).
• Cross-functional engineering collaboration, working directly with design, architecture, and verification teams.
• This internship provides exposure to real product development cycles and prepares students for full time roles in physical design, CPU design, or custom circuit layout.