IP Design Verification Engineer

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About This Role

  • This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to be considered for this position.
  • As an IP Design Verification Engineer, you will play a vital role in ensuring Intel's cutting-edge IP designs meet their functional specifications.
  • This role is for verification in the memory controller and associated IPs in the functional domain.
  • This is a critical IP and area of differentiation for Intel.
  • Your work will directly contribute to the quality and reliability of the memory ecosystem, enabling world-class computing solutions that power innovation across industries.
  • This position offers the opportunity to collaborate with multidisciplinary teams and influence the verification of complex architectural and microarchitectural features.
  • You will drive technical excellence by improving the verification infrastructure and methodologies that underpin Intel's success.
  • Key Responsibilities: Develop and execute IP verification plans, test benches, and environments to ensure comprehensive coverage to meet specifications.
  • Define and run system simulation models to verify designs and identify bugs.
  • Root cause and debug design issues in the presilicon environment, implementing corrective measures to resolve test failures.
  • Collaborate with architects, RTL developers, and physical design teams to enhance verification approaches for complex design features.
  • Document test plans and drive technical reviews to ensure alignment with design and architecture teams.
  • Maintain and refine existing functional verification infrastructure, methodologies, and tools.
  • Participate in the definition and development of verification infrastructure and relevant test framework materials (TFMs).

Requirements

  • are required to be initially considered for this position.
  • Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. +2 years of experience in: SystemVerilog and Python for developing and debugging verification environments.
  • IP validation tools and methodologies, test content development, and test engineering.
  • Microarchitecture fundamentals.
  • Power and performance validation, design for verification (DFV), and formal verification techniques.
  • Advanced English level.
  • Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship).

Nice to Have

  • Experience or understanding of Memory Protocols, such as LPDDR5/6, HBM, DDR5 3+ years of experience in IP functional verification with a Bachelor's degree, or 2+ years with a Master's degree (or PhD).
  • Demonstrated problem-solving skills and ability to drive technical reviews and group problem-solving sessions.
  • Experience improving verification methodologies and infrastructures.
  • Continuously improve verification methodologies and infrastructure.
  • Collaborate effectively across diverse teams and functions.

Sourced directly from Intel’s career page

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Intel

Mexico, Guadalajara

Specialisation
Salary range
₹5-12 LPA to ₹40-70 LPA
Open roles at Intel
695 positions
Job ID
/job/Mexico-Guadalajara/IP-Design-Verification-Engineer_JR0284611

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