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About This Role
- The HPC System Architect is the senior technical lead responsible for defining the next generation of Intel's leading-edge high-performance computing systems.
- Reporting directly to Nic Dube, Corporate Vice President and General Manager of Data Center Systems and Solutions, this position owns forward-looking HPC system architecture from concept through committed definition.
- You will work directly with Intel's CPU and GPU teams to architect the systems that follow today's products - shaping silicon requirements, and defining system-level architecture for the large-scale, scale-out clusters that characterize production HPC.
- The role spans full-system definition: compute node design, memory and I/O balance, scale-out fabric and topology, and the software stack that determines delivered application performance at scale.
- You will engage directly with the customers that set the leading edge of HPC - DOE national laboratories and their exascale and post-exascale programs, financial services institutions, oil and gas operators, and major academic and government research computing centers - translating their workload and facility requirements into system architectures Intel can build, and Intel's roadmap into system concepts they can commit to.
- Responsibilities Own system-level architecture for next-generation HPC clusters: node definition, CPU and GPU configuration, memory bandwidth-to-capacity balance, I/O and parallel storage architecture, and scale-out fabric and topology.
- Define scale-out interconnect architecture - fabric selection, network topology, bisection bandwidth and blocking ratios, collective and communication performance, and resilience at thousands-of-node scale.
- Partner with the CPU and GPU teams to define product requirements for future HPC systems, bringing system-level and workload evidence into silicon definition while requirements remain open.
- Build performance models that project delivered application throughput at scale on unreleased silicon and use them to drive configuration and roadmap decisions.
- Lead architecture co-design and benchmark definition with leadership HPC customers, including acceptance criteria for standard and customer-proprietary application suites.
- Drive HPC requirements into Intel's CPU, GPU, platform, and software roadmaps across DCG and the product and design organizations.
- Evaluate emerging technologies for next-generation HPC systems, including advanced memory, Ultra Ethernet and other scale-out fabric standards, optical interconnect, and heterogeneous accelerator integration.
- Produce reference architectures and system specifications that platform teams, OEM and ODM partners, and system integrators can build to.
- Grow and lead HPC architecture capability within the team, providing technical direction and mentorship to architects and engineers.
- Successful Candidate Profile Deep expertise in HPC system architecture at cluster scale, spanning CPU and GPU configuration, memory subsystem design, scale-out interconnect, and parallel storage.
- Demonstrated experience defining systems around unreleased silicon and influencing CPU or accelerator requirements from a system and workload perspective.
- Fluency with HPC workload characteristics and performance analysis, including quantitative reasoning about scaling behavior, communication patterns, and bottlenecks at scale.
- Working knowledge of the HPC software stack - MPI, OpenMP, GPU programming models, schedulers, and math and communication libraries.
- Proven credibility with sophisticated technical customers in high-stakes procurement and co-design settings.
- Strong understanding of the competitive HPC landscape, including alternative CPU and accelerator architectures, fabric options, and system vendor positioning.
- Excellent written and oral communication skills, effective with both deep technical audiences and executive stakeholders.
- Comfort with high ambiguity and a track record of driving clarity in undefined technical areas.
- Willingness to travel domestically and internationally for customer engagements and technical conferences.
Requirements
- Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, Physics, or a related technical field. 10+ years of experience in HPC, data center, or server system architecture, design, or engineering. 5+ years of experience in a customer-facing or externally-facing technical role.
- Demonstrated experience defining or deploying large-scale compute clusters.
- Preferred Qualifications Master's degree or PhD in a relevant technical discipline.
- Experience defining next-generation systems in partnership with CPU or GPU product and design teams.
- Experience supporting DOE national laboratory or comparable large-scale public-sector HPC procurements.
- Domain experience in a definitional HPC vertical: financial services, oil and gas and seismic processing, weather and climate, computational chemistry or biology, or manufacturing and CAE.
- Hands-on experience with scale-out fabrics including InfiniBand, Ultra Ethernet, or other high-performance interconnect.
- Experience with system-level performance modeling and workload characterization at scale.
- Experience with converged HPC and AI system design.
Benefits
- We offer a total compensation package that ranks among the best in the industry.
- It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
- Find out more about the benefits of working at Intel .
- Annual Salary Range for jobs which could be performed in the US: $220,920.00-311,890.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations.
- Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
- Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
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Job ID
/job/US-California-Santa-Clara/HPC-System-Architecture_JR0287450
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