Formal Verification Engineer

About This Role

• The Role and Impact Intel is seeking a Formal Verification Engineer for the Silicon Chassis team.
• This role focuses on applying formal methods to exhaustively verify our interconnect fabric, protocol bridges, and link-layer logic.
• You will own end-to-end formal verification, from property specification through proof convergence - across multiple protocol domains.
• You will work closely with architecture, design, and software teams and are expected to contribute across traditional discipline boundaries.
• This role requires strong Formal depth, solid protocol knowledge, hands-on coding strength, and growing ability to mentor junior engineers.
• AI-assisted workflows are part of everyday development here.
• Consistent execution against schedule and quality goals is expected.
• Key Responsibilities - Develop and execute comprehensive formal verification test and coverage plans, including the definition of scope, strategy, and techniques. - Create abstraction models to enable convergence on designs and apply abstraction techniques to formal verification. - Generate and validate formal proofs to implement verification plans and resolve failing tests through corrective measures. - Collaborate across architecture, RTL design, and physical design teams to improve the verification of complex architectural and microarchitectural features. - Maintain and enhance existing formal verification infrastructure, tools, and methodologies. - Simplify and model problems using architecture modeling techniques to verify protocols and architectures. - Utilize tools to formally prove design protocols, resolve BDD complexity, and optimize data paths. - Document test plans, track verification progress, and drive technical reviews with cross-functional teams.