Design Verification Engineering Intern

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About This Role

  • ASIC Design & Verification Engineering Opportunity Ready to tackle the cutting-edge challenges of modern semiconductor design? Join our dynamic verification team where you'll work on next-generation System-on-Chip (SoC) technologies that power everything from smartphones to data centers.
  • This role offers hands-on experience with industry-leading EDA tools and methodologies while contributing to high-impact projects that shape the future of silicon innovation.
  • About This Role Modern SoCs have grown exponentially more complex, integrating ever more functionality onto a single silicon die and combining multiple silicon dies into sophisticated packages.
  • ASIC design and verification methodologies must continue to advance and keep pace with this growing complexity to ensure high-quality, functional SoC designs.
  • As ASICs become increasingly complex to enhance functionality, performance, and power efficiency, verification processes must adapt to meet rigorous industry standards.
  • Our team utilizes various advanced verification techniques to simulate and validate designs against ASIC specifications.
  • You'll gain valuable experience with industry-standard EDA tools while developing skills to assess and ensure design quality.
  • Responsibilities included but not limited to: • Strong debugging and problem-solving skills • Excellent written and verbal communication skills • Project-based teamwork experience Qualifications: We are seeking enthusiastic students with strong problem-solving abilities, excellent communication skills, and a genuine desire to learn.
  • Technically, we value candidates with a solid foundation in digital design verification (SystemVerilog, VHDL) and object-oriented programming.
  • Students looking for a challenging and rewarding work experience are strongly encouraged to apply.
  • This position is not eligible for Intel immigration sponsorship.

Requirements

  • Active student pursing a Bachelor degree in Electrical, Computer Engineering or related field Experience or coursework in the following: Digital Logic Design and Verification HVL Languages: Verilog/VHDL, SystemVerilog Programming Languages: C, C++ Scripting: Perl/Python, TCL EDA Simulation Tools Preferred Qualifications: Experience or coursework in the following: Methodologies: UVM (Universal Verification Methodology) Protocols: AMBA-based protocols (AXI, AHB, APB) and industry-standard protocols (UART, I2C, SPI) Low Power verification and Formal Verification Database Management: SQL Business Intelligence Tools: Power BI, Copilot Linux Experience: bash, tcsh Job Type: Student / Intern Shift: Shift 1 (Canada) Primary Location: Virtual Canada Additional Locations: Business group: The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies).
  • The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.
  • Work Model for this Role This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need.
  • However, you must live and work from the country specified in the job posting, in which Intel has a legal presence.
  • Canada Accommodation: Intel is committed to a culture of accessibility.
  • Intel provides accommodations to applicants and employees with disabilities.

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Intel

Virtual Canada

Specialisation
Salary range
₹5-12 LPA to ₹40-70 LPA
Open roles at Intel
765 positions
Job ID
/job/Virtual-Canada/Design-Verification-Engineering-Intern_JR0283524

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