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About This Role
- ASIC Design Automation Engineering Opportunity Transform the future of chip design through intelligent automation! Step into the world of cutting-edge semiconductor development where code meets silicon.
- Our ASIC Design Automation team is at the forefront of revolutionizing how engineers design and verify complex integrated circuits, building the tools and workflows that enable breakthrough innovations in technology.
- About This Role The ASIC DA team is a dynamic, fast-moving team that develops, maintains, and enhances automation scripts and tools to improve the efficiency and quality of our front-end RTL design and verification processes.
- We maintain a collaborative GitHub environment and work closely with front-end designers and verifiers to provide technical support and drive the adoption of automation and DevOps practices.
- In this role, you will gain exposure to both in-house developed techniques and a variety of industry-standard EDA tools and practices.
- You'll be part of a team that's constantly pushing the boundaries of what's possible in design automation, creating solutions that directly impact product development cycles and engineering productivity.
- Responsibilities Debugging and problem-solving skills Excellent written and verbal communication skills Qualifications: We are seeking enthusiastic students with strong problem-solving abilities, excellent communication skills, and a genuine desire to learn.
- While a solid foundation in digital design (VHDL, Verilog) and scripting ability is desired, it is not strictly required—we value passion and potential just as much as experience.
- Students looking for a challenging and rewarding work experience should not hesitate to apply.
- This position is not eligible for Intel immigration sponsorship.
Requirements
- Active student pursuing BASc or BS Computer Science or related field.
- Coursework or experience in the following: Project-based teamwork Fundamental Digital Logic Design knowledge Program in at least one scripting language (Perl, TCL, Ruby, Python) Preferred Qualifications: Linux Experience: bash, tcsh Programming Languages: C, C++, Python, VHDL, SystemVerilog, TCL Job Type: Student / Intern Shift: Shift 1 (Canada) Primary Location: Virtual Canada Additional Locations: Business group: The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies).
- The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.
- Work Model for this Role This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need.
- However, you must live and work from the country specified in the job posting, in which Intel has a legal presence.
- Canada Accommodation: Intel is committed to a culture of accessibility.
- Intel provides accommodations to applicants and employees with disabilities.
Sourced directly from Intel’s career page
Your application goes straight to Intel.
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Specialisation
Open roles at Intel
784 positions
Job ID
/job/Virtual-Canada/Design-Methodology-Engineering-Intern_JR0283526
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